The demand for manufacturing electrical assemblies with greater densities and smaller package size requires devising techniques to efficiently utilize the available area on a printed circuit board. One such technique is to directly bond the integrated circuit chip to corresponding contact points on a printed circuit board, thereby eliminating the necessity of using a chip carrier with a conventional ceramic or plastic cover or encapsulating the integrated circuit chip. The most popular method of directly bonding a chip to a circuit board is known as chip-on-board (COB). In chip-on-board, the integrated circuit is mounted directly on the circuit board and either wire bonded to the circuit board or bonded using TAB technology. This technique has been widely used in manufacturing of watches and other small electronic products. However, the integrated circuit chip is brittle and fragile and subject to stress and breakage if the circuit board is bent, vibrated or exposed to wide variations in temperature. Accordingly, in many applications such as two-way radios and other portable communication devices, where the electrical assembly is subject to vibration and severe environmental disturbances, direct connections between the integrated circuit chip and the circuit board are not desirable and can cause reliability problems.
Conventional ways of protecting and packaging the integrated circuit, such as chip carriers or transfer molded integrated circuit devices, provide a buffer substrate or mounting scheme between the integrated circuit and the circuit board, thereby reducing or eliminating the stress imparted to the chip during mechanical and thermal excursions. There are numerous drawbacks to the use of these types of chip carriers. Chip carriers are larger than the integrated circuit and typically require two to three times the area on the circuit board as the integrated circuit. The finished package is typically expensive and not repairable. The inability of repair a rather expensive package becomes a liability in electrical testing.
In chip-on-board technology, the density of lines and spaces required on the circuit board is extremely high, thereby creating a very complex printed circuit board with fine lines and spaces that is very expensive to manufacture. The use of chip carriers allows one to incorporate printed boards with less stringent line and space requirements, thereby reducing the cost of the printed circuit board. This cost reduction comes at the expense of using a larger chip carrier package which is more expensive and also has a greater height.
in chip-on-board technology, the semiconductor device is attached to the substrate by means of the control-collapse-chip-connection (known as C4). Typically, in order to achieve high yields and reliability in making a C4 connection, a clean room environment must be utilized during this process. One can easily see that the C4 process is not suitble for a normal manufacturing assembly environment where components are mounted onto circuit boards.
Clearly, a need exists for an integrated circuit package that can solve the problems of mechanical and thermal excursions, reduced size, utilize less dense (lower cost) printed circuit boards, provide chip carriers that can be electrically tested prior to assembly to the main circuit board, and does not require a clean room environment for assembly to the main circuit board.